1. Field of the Invention
The present invention relates to solid-state imaging apparatus and particularly to a solid-state imaging apparatus having a charge transfer section which transfers charges generated by a photoelectric conversion section.
2. Description of Related Art
A charge coupled device (CCD) image sensor formed on a semiconductor substrate and having a charge transfer function is widely used in faxes, scanners, copy machines, digital cameras and so on. The CCD image sensor sequentially outputs the signal charges accumulated according to the amount of light received by a photodetector such as a photodiode, thereby obtaining image information.
FIG. 6 is a plan view of a conventional CCD image sensor. The CCD image sensor includes photodiodes 100, a transfer gate electrode 101, and a CCD register 102. A charge detection section and an output circuit, not shown, are placed in one end of the CCD register 102.
The CCD image sensor is a one-dimensional image sensor which includes a photodiode line array consisting of a plurality of photodiodes 100 lined up in one direction. The photodiodes 100 are separated from each other by an element separating region 114 formed of a p+ type diffusion layer. The transfer gate electrode 101 is placed between the photodiodes 100 and the CCD register 102.
In the CCD register 102, four types of electrodes 121 to 124 are arranged repeatedly. The electrode 121 is a Φ1 storage electrode, the electrode 122 is a Φ1 barrier electrode, the electrode 123 is a Φ2 storage electrode, and the electrode 124 is a Φ2 barrier electrode. The electrodes 121 to 124 are connected to a metal line 126 or 127 by a contact 125 to receive a drive pulse Φ1 or Φ2. If a pitch of a unit cell in an electron output direction is L, a set of the four electrodes 121 to 124 corresponds to the pitch L.
Drive pulses Φ1 and Φ2, which are clock pulses with 180° phase difference from each other, are applied to the terminals Φ1 and Φ2, respectively. The potential underneath the electrodes 121 to 124 thereby changes to sequentially transfer electrons from right to left of FIG. 6 in the extending direction of the electrodes 121 to 124 and the metal lines 126 and 127.
One of the main characteristics of the CCD is resolution. Improvement of the resolution requires an increase in the number of photodiodes. Further, improvement of the resolution while keeping the same chip size requires a decrease in the size of a unit cell.
However, the configuration of FIG. 6 places the four electrodes 121 to 124 within the pitch L of a unit cell. Reduction of the unit cell size is thereby restricted by a design rule about electrode layout and a design rule about a connection of each electrode and a metal line such as the size of a contact, the inner margin of the end of a contact from the end of an electrode and so on, hindering the improvement of the resolution.
As a technique for providing a higher resolution CCD image sensor with the same design rule as in FIG. 6, a CCD image sensor which transfers electrons as turning them back is known. This technique is disclosed in Osamu Ohtsuki, “CCD IMAGE SENSOR AND ANALOG SIGNAL PROCESSOR”, The Transactions of The Institute of Electronics, Information and Communication Engineers, April 1977, ED77-2, pp. 9-16, for example.
FIG. 7 is a plan view of another conventional CCD image sensor. The CCD image sensor also includes the photodiodes 100, the transfer gate electrode 101, and the CCD register 102.
In the CCD register 102, Φ1 storage electrodes 121 and Φ1 barrier electrodes 122 are arranged repeatedly in parallel with a photodiode line array. Further, Φ2 storage electrodes 123 and Φ2 barrier electrodes 124 are arranged repeatedly in parallel with the electrodes 121 and 122. An element separating region 114 is formed in the part of the boundaries between the Φ1 barrier electrode 122 and the Φ1 storage electrode 121 which has the Φ1 barrier electrode 122 to the left and the Φ1 storage electrode 121 to the right. The element separating region 114 is also formed in the part of the boundaries between the Φ2 barrier electrode 124 and the Φ2 storage electrode 123 which has the Φ2 barrier electrode 124 to the left and the Φ2 storage electrode 123 to the right.
The CCD register 102 thereby transfers electrons as turning them back in the vertical direction of the figure.
In this CCD image sensor, two electrodes of the electrodes 121 to 124 correspond to the pitch L of a unit cell. Though FIG. 7 shows the case where the electrodes 121 and 122 and the electrodes 123 and 124 are respectively separated in order to clarify the number of electrodes corresponding to the pitch L, those electrodes may be connected.
FIGS. 8A to 8C are cross-sectional views along the lines 8A-8A, 8B-8B, and 8C-8C of FIG. 7, respectively. As shown in FIG. 8A, a p−type well 112 is formed on one principal surface of an n−type substrate 111. In the p−type well 112, an n type well 113 which serves as a transfer channel of the CCD register 102, a p+ type diffusion layer 118 which serves as the element separating region 114, and an n type diffusion layer 115 which serves as a charge accumulation layer of the photodiode 100 are formed. Further, a p+ type diffusion layer 116 is formed on the surface of the n type diffusion layer 115 to reduce a dark current.
Further, as shown in FIGS. 8B and 8C, an n− type diffusion layer 117 is formed in the n type well 113 by partial boron ion implantation or the like. The n− type diffusion layer 117 serves as a barrier region.
FIG. 9A is a chart showing the drive pulse timing in the CCD register 102. FIG. 9B is a view showing the potential in the cross section along the line 8C-8C of FIG. 7. As shown in FIG. 9B, at t=t1, the potential underneath the Φ1 storage electrode 121 is a high level (H) and electrons are accumulated there. At t=t2, the potential underneath the Φ1 storage electrode 121 becomes a low level (L) and the potential underneath the Φ2 barrier electrode 124 and the Φ2 storage electrode 123 becomes a high level and the electrons are transferred to underneath the Φ2 storage electrode 123 through underneath the Φ2 barrier electrode 124. Electrons are sequentially transferred in this way.
The advantage of the CCD image sensor of FIG. 7 is that the number of electrodes within the pitch L of a unit cell is half the number of the CCD image sensor of FIG. 6. The pitch L of a unit cell is thereby decreased to half under the same design rule, which doubles the resolution.
However, the CCD image sensor of FIG. 7 has the following problems. The electrons which are accumulated underneath the Φ1 storage electrode 121 in the area near the photodiode 100 are transferred to underneath the Φ2 storage electrode 123 through underneath the Φ2 barrier electrode 124 by the path Y in FIG. 7.
Thus, the longer the length of the Φ1 storage electrode 121 in the direction perpendicular to the photodiode line array is, the longer an effective transfer length or the entire length of a electron transfer path is. This weakens the transfer electric field underneath the Φ1 storage electrode 121 to deteriorate the electron transfer efficiency. This is the same in the case where electrons are transferred from underneath the Φ2 storage electrode 123 to underneath the Φ1 storage electrode 121 through underneath the Φ1 barrier electrode 122.
Other solid-state imaging apparatus having substantially the same configuration as FIG. 7 are Japanese Unexamined Patent Application Publication No. 58-137250 and Japanese Patent No. 2816063, for example.
As described above, the present invention has recognized that reduction of the pitch of cells to improve the resolution causes the entire length of the electron transfer path to increase, deteriorating the electron transfer efficiency.